1. Field of the Invention
The invention relates to a technology for enhancing a yield and reliability of a semiconductor device.
2. Description of the Related Art
CSP (Chip Size Package) has received attention in recent years as a packaging technology. The CSP means a small package having almost the same outside dimensions as those of a semiconductor die packaged in it. Conventionally, BGA (ball grid array) type semiconductor devices have been known as a kind of CSP. In this BGA type semiconductor device, a plurality of ball-shaped conductive terminals made of metal such as solder is arrayed in a grid pattern on one surface of the package, and electrically connected with the semiconductor die mounted on the other side of the package.
When this BGA type semiconductor device is mounted on electronic equipment, the semiconductor die is electrically connected with an external circuit on a printed circuit board by compression bonding of the ball-shaped conductive terminals to wiring patterns on the printed circuit board.
Such a BGA type semiconductor device has advantages in providing a large number of conductive terminals and in reducing size over other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package), which have lead pins protruding from their sides. The BGA type semiconductor device is used as an image sensor chip for a digital camera incorporated into a mobile telephone, for example.
FIGS. 10A and 10B show an outline structure of the conventional BGA type semiconductor device. FIG. 10A is an oblique perspective figure showing a front side of the BGA type semiconductor device. FIG. 10B is an oblique perspective figure showing a back side of the BGA type semiconductor device.
A semiconductor die 101 is sealed between a first glass substrate 104a and a second glass substrate 104b with resin 105a and 105b therebetween in the BGA type semiconductor device 100. A plurality of ball-shaped terminals (referred to as conductive terminals 111, hereafter) is arrayed in a grid pattern on one surface of the second glass substrate 104b, that is, on the back surface of the BGA type semiconductor device 100. The conductive terminals 111 are connected to the semiconductor die 101 through a plurality of second wirings 109. The plurality of second wirings 109 is connected with aluminum wirings pulled out from inside of the semiconductor die 101, making each of the conductive terminals 111 electrically connected with the semiconductor die 101.
More detailed explanation on the cross-sectional structure of the BGA type semiconductor device 100 will be given hereafter referring to FIG. 11. FIG. 11 shows a cross-sectional view of the BGA type semiconductor devices 100 separated into individual dies along borders (called scribe lines or dicing lines).
A first wiring 103 is provided on an insulation film 102 on the front surface of the semiconductor die 101, as shown in FIG. 11. The semiconductor die 101 is attached to the first glass substrate 104a with the resin 105a. A back surface of the semiconductor die 101 is attached to the second glass substrate 104b with the resin 105b. One end of the first wiring 103 is connected to the second wiring 109. The second wiring 109 extends from the end of the first wiring 103 onto a surface of the second glass substrate 104b. The ball-shaped conductive terminal 111 is formed on the second wiring 109 extended onto the second glass substrate 104b. The technology mentioned above is disclosed in the Japanese Patent Application Publication No. 2002-512436.
A technology of not using the second glass substrate on the back surface of the semiconductor wafer is disclosed in the Japanese Patent Application Publication No. 2004-80006 by the inventors of this invention.
Explanation on a BGA-type semiconductor device manufacturing method will be given particularly for a case that a sheet of supporting body is attached to a semiconductor die, with reference to figures.
FIGS. 12 to 14 are cross-sectional views showing a conventional BGA-type semiconductor device manufacturing method applicable to an image sensor chip.
First, as shown in FIG. 12, a first wiring 32 formed of an aluminum layer or an aluminum alloy layer is formed on a front surface of a semiconductor substrate 30 with a first insulation film 31 formed of a silicon oxide film, a silicon nitride film, or the like therebetween. Then, a glass substrate 34 is attached to the semiconductor substrate 30 including the first wiring 32 with an adhesive 33 formed of epoxy resin therebetween, for example.
Next, as shown in FIG. 13, a resist film (not shown) is formed on the back surface of the semiconductor substrate 30, having an opening in a position corresponding to the first wiring 32. Then, dry-etching is performed to the semiconductor substrate 30 using the resist film as a mask, and further the insulation film 31 is etched to form an opening 35 from the back surface of the semiconductor substrate 30 to the first wiring 32.
Then, a second insulation film 36 is formed on the back surface of the semiconductor substrate 30 including in the opening 35, and the second insulation film 36 is etched to expose a front surface of the first wiring 32. Then, as shown in FIG. 14, a wiring layer 37 connected with the first wiring 32 is formed with the second insulation film 36 therebetween. Furthermore, a protection layer (not shown) is formed on the wiring layer 37, and an opening is provided in a predetermined position of the protection layer and a ball-shaped terminal 38 contacting the wiring layer 37 is formed.
Although not shown, the semiconductor substrate and the layers layered thereon are then cut into individual semiconductor dies. Thus, the BGA-type semiconductor device where the first wiring 32 and the ball-shaped terminal 38 are electrically connected with each other is formed.
However, during the described manufacturing process of the semiconductor device, the thickness of the second insulation film 36 becomes small as shown in FIG. 14, depending on the state of depositing the second insulation film 36 or the state of etching the second insulation film 36 in order to expose the front surface of the first wiring 32 after the deposition of the second insulation film 36, for example. This causes problems of reducing dielectric strength, or infiltrating treatment chemicals and the like into the semiconductor device from a silicon end portion through the opening 35 to corrode the first wiring 32. Particularly, the thickness of the deposited insulation film on the bottom portion and sidewall portion of the opening 35 tends to be smaller than on the back surface of the semiconductor substrate 30 as shown in FIG. 14, so that the portion designated as A may be covered insufficiently. This can reduce resistance to moisture infiltration after manufacturing.